1. Field of the Invention
This invention relates to a bus-based communication system, and in particular to a system for arbitrating between components connected to the bus, and for signalling over the bus.
2. Description of the Related Art
Multidrop serial buses are known for their low infrastructure costs and straightforward setup. Examples include the I2C™ bus and the CAN bus. The flexibility of these buses comes largely from the fact that any of the connected components, which may for example be separate integrated circuits, may arbitrate for access. Distributed arbitration is used because centralized or daisy-chained arbitration would have raised the infrastructure costs. Though the main purpose of the data line of the bus is to carry data payloads, it also supports the arbitration process.
In these prior art buses, the data line has a dominant state and a recessive state. For example, I2C uses the well known wired-OR arrangement with open collector drivers and a pull up resistor. The line goes high (recessive) only when none of the components is driving it low (dominant). The arbitration process actually relies on this dominant-recessive behaviour. It uses a protocol called “bit dominance” or “binary countdown”, which works as follows. Each arbitrating component starts writing a unique access code, i.e. number, to the line, one bit at a time. At each stage the component also reads back the state of the line. If it wrote the recessive state but it reads back the dominant state, the component loses arbitration and drops out. At the end of the process, the one component that has not dropped out wins access to the bus.
The drive impedance of the recessive state is generally at least an order of magnitude higher than that of the dominant state. Hence such buses tend to have relatively high susceptibility to interference. Similarly, the transitions to the recessive state generally take at least an order of magnitude longer than those to the dominant state. Hence such buses tend to have a relatively low maximum bit rate. Power dissipation can also be a problem. On wired-OR communications buses, the pull-up resistor dissipates power even while the dominant-recessive behaviour is not required, e.g. while data payloads are being carried.
Systems that instead have low-high symmetry in their electrical layer are unencumbered by the weaknesses of a recessive state. They tend to be more robust, faster and less power-hungry. Hence buses that don't need dominant-recessive behaviour generally have broadly symmetric electrical layers. This includes basic time-division-multiplex serial buses, for example, although such buses typically do not support arbitration.